1. Field of the Invention
The present invention relates to a method of producing a semiconductor member and a method of utilizing it. Specifically, the present invention relates to a method of producing semiconductor wafers which are used for production of semiconductor devices such as micro processors, memories, logic circuits, system LSIs, solar cells, image sensors, light-emitting elements, display elements, etc., or which are monitor wafers to be used for film thickness monitoring at the time of film formation, etched-depth monitoring at the time of etching, particle monitoring to be used for detection of foreign matter particles as well as measurement of the number thereof, etc., dummy wafers to be disposed in treatment apparatuses for use in order to make good various treatment conditions such as film forming, heat treatment, doping, etching, etc.; and a method of using the wafers as well as a method of utilizing the wafers. Further, the present invention relates to a system of producing two kind of semiconductor wafers, a method of controlling production of the semiconductor wafers and a method of utilizing a deposited-film forming apparatus.
2. Related Background Art
Semiconductor wafers include wafers having layers of various semiconductor materials such as Si, GaAs, InP, GaN, etc. Among others, an SOI wafer which has a semiconductor layer on a supporting substrate having an insulating surface catches attention as a wafer appropriate for production of semiconductor devices capable of high speed operation with low power consumption.
The SOI wafers include known SIMOX wafers subjected to an oxygen ion implanting step and a heat treatment step, bonding wafers subjected to a hydrogen ion implanting step and a peeling step which are described in Japanese Patent Application Laid-Open No. 5-211128 (U.S. Pat. No. 5,374,564) and Japanese Patent Application Laid-Open No. 10-200080 (U.S. Pat. No. 5,966,620), and bonding wafers using plasma etching described in International Application Publication No. WO98/52216, etc. In addition, as a production method for excellent SOI wafers, a method of transferring an epitaxial layer another supporting substrate material is proposed in Japanese Patent Application Laid-Open No. 2608351 (U.S. Pat. No. 5,371,037).
Moreover, an improved method for transferring an epitaxial layer is proposed in Japanese Patent Application Laid-Open No. 7-302889 (U.S. Pat. No. 5,856,229). This method will be specifically described below.
FIGS. 19A to 19E are schematic views showing a method of transferring an epitaxial layer which is described in Japanese Patent Application Laid-Open No. 7-302889.
Firstly, as shown in FIG. 19A, an Si wafer 1 is prepared as a first wafer (which in some cases is called as prime wafer, bond wafer, device wafer, seed wafer, donor wafer, etc.), and a surface layer thereof subjected to anodization and made porous to form a porous layer 4.
Next, as shown in FIG. 19B, a CVD method, etc. is applied to epitaxially grow a non-porous single-crystalline semiconductor layer 5 on the porous layer 4.
Moreover, as shown in FIG. 19C, a surface of the non-porous single-crystalline semiconductor layer 5 is oxidized to form an insulating layer 6. The insulating layer 6 is bonded onto a surface of a separately prepared second wafer 2 (Si wafer or silica glass, etc.). Thus a multilayer structure 100 having the non-porous single-crystalline semiconductor layer 5 inside is obtained.
As shown in FIG. 19D, when a wedge is struck into a side surface of this multilayer structure 100 or when external force or internal stress is applied so as to separate the multilayer structure, the multilayer structure 100 is divided at a porous layer portion (reference numerals 41 and 42 in FIG. 19D denote separated porous layers).
A porous layer 42 left on a surface of the non-porous single-crystalline semiconductor layer 5, i.e., an epitaxial layer which is transferred onto the above-described second wafer 2 (which are referred to as a handle wafer or a base wafer, etc., in some cases) is subjected to wet etching with a mixed liquid of fluoric acid and hydrogen peroxide solution to be removed.
In addition, as shown in FIG. 19E, an exposed surface of the epitaxial layer is flattened by hydrogen annealing, etc. to complete an SOI wafer.
On the other hand, since a separated Si wafer 1 maintains its shape as a wafer, a porous layer left on its separation surface is etched with the above-described mixed liquid, etc. and polished, and the separated wafer can be used so as to produce another SOI wafer as the first wafer shown in FIG. 19A again.
Alternatively, the separated wafer can be used as a second wafer 2 shown in FIG. 19B so as to produce another SOI wafer.
As described above, the above-described Japanese Patent Application Laid-Open No. 7-302889 describes that the peeled Si wafer 1 is used as the first wafer shown in FIG. 19A or the second wafer 2 shown in FIG. 19B.
However, the above-described method has several potential problems to be solved.
That is, it is desirable that a number of SOI wafers are produced using less sheets of wafer as much as possible, but one wafer subjected to a plurality of uses in production steps of SOI wafers is finally discarded. This will not be adjusted to industry in the near future when decrease of wastes generation and efficient use of resources will be expected.
In addition, in the case where an Si wafer is reused some times as the first wafer, the first wafer loses its film thickness every time of reuse due to a step of making a wafer porous and a step of removing a porous layer after separation. Accordingly, in the case where the,wafer is reused some times, difference in thickness of a wafer not reused and the above-described reused wafer becomes remarkable. In such a case where the, wafer is subjected to a treatment step depending on thickness of wafers again as in step of making a wafer porous, significant difference in thickness for respective wafers will presumably make setting or adjustment of various treatment conditions time-consuming.
In addition, when a multilayer structure is formed, the thickness of the first wafer sensitively affects wrap of the multilayer structure in some cases.
Further, it is considered that damages stored due to the repeated separation steps adversely affect the subsequent step of making a wafer porous and the like, whereby SOI wafers having desired characteristics are not obtained.
That is, in conventional reuse method, it is only considered that a reusable first wafer obtainable by SOI wafer-producing steps is repeatedly used in the same SOI wafer producing steps, and therefore the above-described problems are considered.
An object of the present invention is to provide a method of producing semiconductor wafers having efficient and economical application mode of wafers.
In addition, another object of the present invention is to provide a semiconductor wafer-producing system which enables efficient and economical application of semiconductor wafers.
A method of producing a semiconductor wafer according to the present invention comprises a first step of forming a first member having a non-porous layer on a semiconductor substrate, and a second step of separating the non-porous layer from the first member and transferring the non-porous layer onto a second member, wherein use of the semiconductor substrate from which the non-porous layer is separated in the second step as a constituent material of the first member in the first step is conducted (nxe2x88x921) times (xe2x80x9cnxe2x80x9d is a natural number not less than 2), the first and second steps are repeated n times, the semiconductor substrate is separated in n-th use in the second step and the separated semiconductor substrate is used for an use other than that of the first and second steps. The first member can be formed the non-porous layer on the semiconductor substrate through a separation layer.
A method of producing a semiconductor member according to the present invention comprises a first step of preparing a first member having a non-porous layer on a semiconductor substrate, and a second step of transferring the non-porous layer from the first member onto a second member, wherein use of the semiconductor substrate from which the non-porous layer is separated in the second step as a constituent material of the first member in the first step is conducted (nxe2x88x921) times (xe2x80x9cnxe2x80x9d is a natural number not less than 2), the first and second steps are repeated n times, the semiconductor substrate is separated in n-th use in the second step and the separated semiconductor substrate is used for an use other than that of the first and second steps.
Particularly, in the present invention, the first member has the non-porous layer on the semiconductor substrate through a separation layer, and the second step includes a step of bonding the first and second members to each other with positioning the-non-porous layer inside to form a multilayer structure and separating the multilayer structure at the separation layer.
In the present invention, the purpose other than the first and second steps can be to sale the semiconductor substrate separated in the n-th use in the second step and to produce an epitaxial wafer using the semiconductor substrate and sale it.
The above-described separation layer can be a layer formed by anodization or an ion-implanted layer formed by implanting ions such as hydrogen ions into a layer.
In the method of the present invention, the step of preparing the first member can include: a step of forming a first epitaxial semiconductor layer on the semiconductor substrate; a step of making at least a part of the first epitaxial semiconductor layer porous to a porous layer; and a step of forming the non-porous layer on the porous layer, thereby preparing the first member.
In the method of the present invention, the step of preparing the first member can include: a step of forming, on the semiconductor substrate, a first semiconductor layer which is an epitaxial layer, a second semiconductor layer different in impurity concentration or conductivity type from the first semiconductor layer in this order from the semiconductor substrate side; a step of making at least a part of the first and second semiconductor layers porous to form a porous layer; and a step of forming the non-porous layer on the porous layer, thereby preparing the first member.
In the method of the present invention, the semiconductor substrate can be a p-type semiconductor substrate, the first semiconductor layer can have a concentration of an impurity for controlling a p-type conductivity smaller than that of the semiconductor substrate, and the second semiconductor layer can have a concentration of an impurity for controlling a p-type conductivity larger than that of the first semiconductor layer.
In the method of the present invention, the step of preparing the first member can include: a step of forming a first epitaxial semiconductor layer on the semiconductor substrate; and a step of forming an ion-implanted layer inside the first epitaxial semiconductor layer, thereby preparing the first member.
In the method of the present invention, the step of preparing the first member can include: a step of forming, on the semiconductor substrate, a first semiconductor layer which is an epitaxial layer, a second semiconductor layer different in impurity concentration or conductivity type from the first semiconductor layer in this order from the semiconductor substrate side; and a step of forming an ion-implanted layer inside the first semiconductor layer and/or the second semiconductor layer, thereby preparing the first member.
The second member can have an insulating layer on a surface thereof.
The second step can comprises flattening the surface of the semiconductor substrate obtained by separating the non-porous layer from the first member in the second step.
The flattening is conducted by surface-polishing, etching and heat-treating of the semiconductor substrate.
The method of the present invention further comprises a inspection step of conducting at least one of surface foreign matter particle density inspection, thickness distribution, defect density inspection, surface shape inspection or edge inspection, after the surface flattening treatment of the semiconductor substrate used n times in production of the semiconductor member.
In the method of the present invention, n can be determined by subjecting the semiconductor substrate, which is obtained by separating the non-porous layer from the first member in the second step, to a inspection step of conducting at least one of surface foreign matter particle density inspection, thickness distribution, defect density inspection, surface shape inspection or edge inspection.
In the method of the present invention, the semiconductor member can be an SOI wafer, and after the semiconductor substrate is used in the first and second steps two times or more, the semiconductor substrate can be used to produce an epitaxial wafer for an use other than that of the method of producing the semiconductor member.
In the method of the present invention, the use other than that of the first and second steps is production of an epitaxial wafer, and the above-described value n can be defined corresponding to the number of ordered sheets of epitaxial wafer which is recorded in a computer.
The method of utilizing a semiconductor substrate according to the present invention comprises applying a semiconductor substrate used plural times in production steps of a bonding SOI wafer to an use other than that of the production steps of the bonding SOI wafer.
The use other than that of the production steps of the bonding SOI wafer includes sale of the semiconductor substrate used plural times.
The use other than that of the production steps of the bonding SOI wafer includes production of an epitaxial wafer by using the semiconductor substrate used plural times and sale of the epitaxial wafer.
The system of producing a semiconductor member according to the present invention is a system of producing two kinds of semiconductor members, which comprises a step of using a semiconductor member obtained from SOI substrate production steps utilizing a bonding method in the SOI substrate production steps n times (n24 2), and a step of producing an epitaxial wafer for an use other than that of the SOI substrate production steps by using the semiconductor member used plural times.
The method of controlling the production of a semiconductor member according to the present invention, which comprises using a semiconductor substrate in bonding SOI wafer production steps n times (n greater than 2) to produce n sheets of SOI wafer, utilizing the semiconductor substrate as an epitaxial wafer for an use other than that of the bonding SOI substrate production steps, and controlling use times n to adjust the production amounts of the SOI wafer and the epitaxial wafer.
The method of utilizing a deposited film-forming apparatus according to the present invention comprises commonly using a deposited film-forming apparatus for forming an epitaxial wafer having an epitaxial layer on a semiconductor substrate for use in production steps of a plurality of sheets of bonding SOI wafer and a deposited film-forming apparatus for forming an epitaxial wafer in which the semiconductor substrate is applied to an use other than that of the production steps of the SOI wafer.
The production method of the present invention further comprises a step of heat-treating the multilayer structure in an oxidizing atmosphere.